Japan EDA Insight (1)

Summary:  

T-Engine Development Kit is an open platform for embedded system development offered as a total complete package with H/W, S/W, and a development environment. T-Engine consists of three boards: CPU, LCD, and debug boards

Throughout my experience studying and living in Japan for over than five years, I had the opportunity to meet with many colleagues working in the field of EDA whether in famous companies or in Universities, and together with my humble Japanese language, that helped me a lot to break the culture barrier/shock that any middle-east foreigner pass through when he lives in a far-east country like China, Korea or Japan with these amazing 10,000 Kanji characters. I managed to build a solid knowledge base of many ideas and technologies influencing and driving the Japanese community that I would like to share with you in a series of articles which I write from the perspective of an EDA engineer. So I chose the name “Japan EDA” as a title, and because these articles actually open the door for more reading and analysis, I complemented the title with the word “insight” meaning a piece of Information. The topics would vary from the Educational System in Universities, Research Organizations, Design Tools, Hardware Platforms, and many other EDA trends, which I truly hope that VLSI-Egypt magazine readers find useful and interesting.

T-Engine – Steering the Ubiquitous Computing World in Japan

Prof. Ken Sakamura (坂村 健) is a Japanese professor in Information science at the University of Tokyo. He is the creator of the Real-Time Operating System architecture TRON. As of 2006, Prof. Sakamura started the ubiquitous networking laboratory (UNL), located in Gotanda, Tokyo as well as the T-Engine forum for consumer electronics which contains many Japanese companies, and which I was actually a member of, representing my University. The joint goal of Ubiquitous Networking specification and the T-Engine forum, is to enable any everyday device to broadcast and receive information as shown in the use model of Figure 1. In this article, I would present the T-Engine development kit and in the following article, I would present more about its applications that I experienced in Ubiquitous-Japan.

Figure 1. Ubiquitous Computing Applications

T-Engine Development Kit is an open platform for embedded system development offered as a total  complete package with H/W, S/W, and a development environment. T-Engine consists of three boards: CPU, LCD, and debug boards, as shown in Figure 2 and internal architecture is shown in Figure 3.  The CPU board mounts an SH7727 SoC (SH3/DSP core) from Renesas Technology (There are actually different versions/series of T-Engine if you explore more at http://www.t-engine.org/),  internal clock 96 MHz/external clock 48 MHz, 8 MB flash memory, 32 MB SDRAM, CF card interface, USB host, PCMCIA interface, sound generator chip, 2-channel serial interfaces to which one channel is connected to the host PC for debugging and downloading the application S/W, power supply controller, and a Real Time clock (RTC).

The LCD board mounts a touch panel interface, infrared remote control photo acceptance unit, and a Key SW {SW1, SW2, SW3}. The LCD panel is 240(H) x 320(V), 262,144 colors and it is controlled by an SH7727 on-chip LCD controller (LCDC).  The CPU board has a bus expansion slot to which a debugger board is connected. The debugger board is used mainly in our experiment to calibrate the embedded S/W running on T-Engine using a JTAG (ICE) debugger for (SH3/DSP) core connected via a JTAG connector.

JTAG (Joint Test Action Group, IEEE Standard 1149.1 and IEEE Standard Test Access Port and Boundary Scan Architecture) was originally designed for boundary scan. It allows read/write internal registers via limited number of pins (typically 5 pins). It is now becoming popular to use JTAG interface and use DCU (Debug control Unit) inside the CPU. JTAG ICE provide very basic debug feature such as run-control, memory/register view/edit, download, etc.

Figure 2. T-Engine Development Kit

Figure 3. T-Engine SH7727 Architecture

When developing applications on this platform, we typically write it in C/C++ and link it with the T-Kernel RTOS, other middle ware, device drivers, and GUI widget components and use Partner-J/SH, a JTAG ICE from Kyoto Micro-Computer, together with H-UDI (Hitachi user-debugging interface) supported by the SH7727, to perform on-chip debugging. The H-UDI is a serial interface which is compatible with JTAG specifications. The JTAG debugger is accompanied with S/W debugger program to monitor program execution, and perform real-time trace.

Mohamed AbdElSalam is a Technical Lead for the Mentor Graphics Emulation Division (MED) –Egypt. He received his M.S. Degree from Ain-Shams University, Cairo, Egypt, and Doctor of Information Science and Technology from Osaka University, Osaka, Japan. He joined Mentor Graphics 1998-2002 in CSD, DCS-HDS, and again in 2008 to present in MED’s iSolve Group, working on hardware emulation target solutions for USB/SATA and transactors.

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